1. Field of the Invention
This invention relates generally to the field of data processing systems and particularly to a shared memory structure for a multiprocessor system.
2. Prior Art
Communications processing in modems, digital cellular phones and the like typically employs a microprocessor controller and one or more digital signal processing (DSP) co-processors. It is desirable to provide a processing system that integrates all communications processing functions on a single integrated circuit. Due to limitations on the number of pins in a package and the long access times to access data from external memory, it is a practical necessity for one or more processors in a single chip multi-processor to execute from internal memory, as well as use internal memory to maintain data. It is necessary to load program code from external memory into the internal memories and execute from them, and at the same time permit relocation of code within the pages of internal memory to facilitate runtime process switching.
Due to the fundamental nature of DSP computations, the integration of data and program memories with the DSP engines on a single chip can provide significant savings in cost and power dissipation. On the other hand, on-chip random access memory (RAM) is very "expensive" in terms of power requirements and silicon area. One alternative is to use programmed read only memory (ROM) for the DSP engines; however, this makes product maintenance and development more difficult. The present invention provides a unique memory architecture that addresses these conflicting requirements.